A New design of 1-bit full adder based on XOR-XNOR gate
نویسندگان
چکیده
In this paper propose a new high performance 1 bit full adder cell using XOR/XNOR gate design style as well as lower power consumption. Simulation results illustrate the superiority of the resulting proposed adder against conventional 1-bit full-adder in terms of power consumption improvement performance (98% of 10T, 47% of 14T & 16T), propagation delay and PDP. We have performed simulations using TSPICE in a 0.180μm standard CMOS technology.
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